Today's complex systems on chip (SoC) encompass hardware acceleration blocks, many cores, and buses. Functionality issues and performance problems in such complex systems are not easy to analyse. One of the difficulties is the configuration of the on-chip debug features on these systems. As an example, there are more than 250 debug configuration registers associated with the Data Path Acceleration Architecture (DPAA) block of the so-called QorIQ processors.
Users are focused to learn about system and modules functionality and do not have the time budget to also dig into the details of the on-chip debug hardware. Instead they require a way to easily configure the debug features to obtain visibility into the performance and the behaviour of sub-systems such as cores, hardware acceleration blocks, bus, memory and interconnections.
The engineers working with complex SoCs do not have facile means to describe a debug configuration, which, in such systems, could include hundreds of registers, in order to obtain visibility into the system's activity. Engineering teams are mostly specialized in one or more subsystems. However when debugging, they cannot ignore the interaction with other blocks in the system. They might need more details of the subsystems for which they are experts in, while for the other subsystems, they might need only a high level perspective.
Known methods to configure debug IP modules have not addressed well the above problems. Most of the tools are only targeting the software debug (i.e. processing cores only) and configuration APIs are usually just exposing the debug registers, so the user would need to be knowledgeable of the debug IP modules. Some debug configurations can be described in XML files but such methods proved very error prone (e.g. in CodeWarrior, user would need to modify a 9000 line file to define a DPAA debug configuration).
Most of the known debugging tools provide a graphical user interface (GUI) for interaction with a user. The known GUIs are used to simply expose the debug register contents.
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